1. Field of the Invention
The present invention relates to an address translation system in a data processing system employing a virtual storage system, and more particularly to the control of purging the address translation pairs set in some buffer registers, which translates virtual addresses into real addresses, especially in the case where the users' space is shared by a plurality of tasks.
2. Description of the Prior Art
In the case where many programs must be processed by a single data processing system, it may happen that the capacity of the main memory of the data processing system is insufficient for all the programs. The conventional method for dealing with such a case is to store most of the programs in an external memory such as a magnetic tape or disc and to store only a few of them in the main memory. In this method, therefore, the frequent transfer of data between the main memory and the external memory is necessary. It is preferable in such a data processing system that each program is divided into segments while each segment is split into pages. Accordingly, the data page consisting of a certain number of bytes is the smallest unit relocated between the main memory and the external memory. Each segment and each page have their own symbolic addresses called "logical addresses". In case where such logical addresses are used, they have to be translated into real addresses in the main memory.
A central processing unit (referred to also as CPU) can access only real addresses and when data is not yet transferred from the external memory to the main memory, the mapping fault is detected by the address translation table, an interruption is generated and the data transfer from the external memory to the main memory takes place. The transfer of data from the external memory serving as the virtual storage space to the main memory serving as the real storage space is performed page by page. If in this case the main memory has no vacant area in which the data from the external memory is to be stored, the pages which went out of use or are only rarely used, are returned to the external memory to create vacant areas in the main memory and new data is transferred from the external memory and stored in the vacant areas. The operation of transferring a part of the data in the external memory to the main memory is called "roll in" or "swap-in" and the reverse operation is called "roll out" or swap-out". Both the operations are generically called "swapping".
Moreover, in order to reduce the time required for address translation, translation pairs each consisting of a virtual address and a real, i.e. translated, address are registered in a translation lookaside buffer (referred to also as TLB). Especially, in order to improve the processing efficiency of the data processing system, the TLB can be shared by plural virtual storage spaces. Namely, in a central processing unit (CPU) processing a task A by using a virtual storage space, each entry of the TLB corresponding to the task A has not only the address translation pair of a virtual and a real address relevant to the virtual space but also an identification flag for identifying the task A. When the task A is switched to a task B by some cause or other as the program process proceeds, the address translation pairs for the task A are left as they are in the TLB and the task B is processed in accordance with a similar program process. New address translation pairs may be registered in the TLB, if necessary. If the task A is again required to be processed, the flag for identifying the task A, remaining in the TLB, is referred to and the real address in the entry having the flag for the task A is directly used to shorten the translation time. In order to discriminate the tasks A, B and so on, there is provided a table base stack consisting of plural registers for storing an origin address of address translation tables used for a task. Each task has a different table origin address. The position of respective registers storing the different origin address is used as the task identification flag in the TLB.
When the processings of all the tasks are completed or when the task went out of use, the corresponding virtual space is eliminated, and then the translation pairs of TLB which is used for the task are to be also eliminated. In this case, all the contents of the TLB are eliminated or the translation pairs used for the processing of the tasks are eliminated page by page.
In the multiprocessor system in which plural CPU's share a main memory, besides the above described operations, when a CPU is subjected to swapping out, it interrupts the remaining CPU's through direct control so as to communicate with the remaining CPU's or the address data of its areas to be swapped out is stored in the specific address in the main memory so that the other CPU's refer to the specific address to purge only corresponding ones of all their translation pairs.
However, as the address translation pairs used by a task increase in number, the program steps for eliminating a virtual space or swapping out also increase or too long a time is required to eliminate page by page the address translation pairs registered in the TLB. Furthermore, in a multiprocessor system, every swap-out operation of one CPU accompanies such influences upon the other CPU's as the external interruptions to the other CPU's or the references of the specific address in the main memory by the other CPU's. Therefore, the processing time is prolonged and the processing efficiency is lowered.